Analog / Mixed Signal design engineer with experience and knowledge of CMOS IC design in deep sub-micron technology.
Past successful experience of designing high speed low power circuitry like flash ADC, 10G or higher serdes, 10G or higher PLL etc.
10+ years experience in CMOS analog design techniques, expertise in design techniques for op-amps, reference sources, analog to digital converters, digital to analog converters, high speed custom digital logic, CDR, VCO, phase detectors etc.
Understanding of device physics and analog layout issues for good matching, low offset amplifiers, and low noise designs.
Knowledge of Cadence design entry, simulation, and verification CAD tools.
Design zeal for ultra low power designs and out of box thinking a must.
Prefer MSEE or PhD.
Location:
Preferred location is Allentown, PA. Remote locations will be entertained for exceptional candidates on a case by case basis.